Network coding increases throughput and is robust against failures and erasures. However, since it allows mixing of information within the network, a single corrupted packet genera...
This paper presents a novel technique, Memory Mapped ECC, which reduces the cost of providing error correction for SRAM caches. It is important to limit such overheads as processo...
As technology scaling poses a threat to DRAM scaling due to physical limitations such as limited charge, alternative memory technologies including several emerging non-volatile me...
A software product line (SPL) is a family of related program variants in a well-defined domain, generated from a set of features. A fundamental difference from classical applicati...
Shortened cyclic codes that are capable of correcting up to a single burst of errors are considered. The efficiency of such codes has been analized by how well they approximate the...