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SIGCSE
2008
ACM
131views Education» more  SIGCSE 2008»
15 years 2 months ago
Compiler error messages: what can help novices?
Novices find it difficult to understand and use compiler error messages. It is useful to refine this observation and study the effect of different message styles on how well and q...
Marie-Hélène Nienaltowski, Michela P...
IOLTS
2006
IEEE
103views Hardware» more  IOLTS 2006»
15 years 8 months ago
Designing Robust Checkers in the Presence of Massive Timing Errors
So far, performance and reliability of circuits have been determined by worst-case characterization of silicon and environmental noise. As new deep sub-micron technologies exacerb...
Frederic Worm, Patrick Thiran, Paolo Ienne
WCNC
2008
IEEE
15 years 9 months ago
Genetic Algorithm Aided Design of Near-Capacity Irregular Variable Length Codes
— In this paper we demonstrate that our ability to match the EXtrinsic Information Transfer (EXIT) function of an Irregular Variable Length Code (IrVLC) to that of a seriallyconc...
Robert G. Maunder, Lajos Hanzo
MICRO
2002
IEEE
159views Hardware» more  MICRO 2002»
15 years 7 months ago
Master/slave speculative parallelization
Master/Slave Speculative Parallelization (MSSP) is an execution paradigm for improving the execution rate of sequential programs by parallelizing them speculatively for execution ...
Craig B. Zilles, Gurindar S. Sohi
DFT
2009
IEEE
175views VLSI» more  DFT 2009»
15 years 9 months ago
Using RRNS Codes for Cluster Faults Tolerance in Hybrid Memories
Hybrid CMOS/non-CMOS memories, in short hybrid memories, have been lauded as future ultra-capacity data memories. Nonetheless, such memories are going to suffer from high degree o...
Nor Zaidi Haron, Said Hamdioui