168 search results - page 8 / 34 » Parallel hardware objects for dynamically partial reconfigur... |
134
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IPPS
2005
IEEE
15 years 10 months ago
2005
IEEE
Modern internet and telephone switches consist of numerous VLSI-circuits operating at high frequencies to handle high bandwidths. It is beyond question that such systems must cont...
126
Voted
EH
1999
IEEE
15 years 9 months ago
1999
IEEE
MorphoSys is a system-on-chip which combines a RISC processor with an array of reconfigurable cells. The important features of MorphoSys are coarse-grain granularity, dynamic reco...
178
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DFT
2006
IEEE
15 years 11 months ago
2006
IEEE
This paper describes a methodology of creating a built-in diagnostic system of a System on Chip and experimental results of the system application on the AT94K FPSLIC with cores d...
130
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GCC
2004
Springer
15 years 10 months ago
2004
Springer
Abstract. In this paper, we constructed the Distributed Object Group Framework(DOGF) which is a reconfigurable architecture supporting dynamically adaptation of distributed service...
141
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ERSA
2009
15 years 2 months ago
2009
In this paper, we introduce the Woolcano reconfigurable processor architecture. The architecture is based on the Xilinx Virtex-4 FX FPGA and leverages the Auxiliary Processing Uni...