2563 search results - page 221 / 513 » Parallel matrix algorithms and applications |
133
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IPPS
1998
IEEE
15 years 9 months ago
1998
IEEE
We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...
141
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IPPS
2007
IEEE
15 years 11 months ago
2007
IEEE
— This paper introduces the Abstract Data and Communication Library (ADCL). ADCL is an application level communication library aiming at providing the highest possible performanc...
140
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ICS
2009
Tsinghua U.
15 years 12 months ago
2009
Tsinghua U.
Power and energy are first-order design constraints in high performance computing. Current research using dynamic voltage scaling (DVS) relies on trading increased execution time...
143
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IPPS
2007
IEEE
15 years 11 months ago
2007
IEEE
Driven by the increasing componentization of scientific codes, the deployment of high-end system infrastructures such as the Grid, and the desire to support high level problem so...
164
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IPPS
2005
IEEE
2005
IEEE
A Framework for Partitioning Computational Intensive Applications in Hybrid Reconfigurable Platforms
15 years 10 months ago
In this paper, we describe a prototype software framework that implements a formalized methodology for partitioning computational intensive applications between reconfigurable har...