104 search results - page 17 / 21 » Parallel processor scheduling with delay constraints |
IEEEPACT
2003
IEEE
15 years 4 months ago
2003
IEEE
This paper presents a framework for analyzing the performance of multithreaded programs using a model called a constraint graph. We review previous constraint graph definitions fo...
ISCA
2005
IEEE
15 years 5 months ago
2005
IEEE
One of the most important problems faced by microarchitecture designers is the poor scalability of some of the current solutions with increased clock frequencies and wider pipelin...
MICRO
1997
IEEE
15 years 3 months ago
1997
IEEE
Predicated execution is a promising architectural feature for exploiting instruction-level parallelism in the presence of control flow. Compiling for predicated execution involve...
HPCS
2007
IEEE
15 years 6 months ago
2007
IEEE
In the context of computational grids, a metascheduler is the service responsible for scheduling jobs across many geographically distributed processor clusters. Typically, these s...
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ICCAD
2003
IEEE
15 years 4 months ago
2003
IEEE
While performance, area, and power constraints have been the driving force in designing current communication-enabled embedded systems, post-fabrication and run-time adaptability ...