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IPPS
2010
IEEE
14 years 9 months ago
Structuring the execution of OpenMP applications for multicore architectures
Abstract--The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user frien...
François Broquedis, Olivier Aumage, Brice G...
ASPLOS
1989
ACM
15 years 3 months ago
Architecture and Compiler Tradeoffs for a Long Instruction Word Microprocessor
A very long instruction word (VLIW) processorexploits parallelism by controlling multiple operations in a single instruction word. This paper describes the architecture and compil...
Robert Cohn, Thomas R. Gross, Monica S. Lam, P. S....
ASPLOS
2009
ACM
15 years 3 months ago
Accelerating phase unwrapping and affine transformations for optical quadrature microscopy using CUDA
Optical Quadrature Microscopy (OQM) is a process which uses phase data to capture information about the sample being studied. OQM is part of an imaging framework developed by the ...
Perhaad Mistry, Sherman Braganza, David R. Kaeli, ...
ASPLOS
2006
ACM
15 years 2 months ago
Comprehensively and efficiently protecting the heap
The goal of this paper is to propose a scheme that provides comprehensive security protection for the heap. Heap vulnerabilities are increasingly being exploited for attacks on co...
Mazen Kharbutli, Xiaowei Jiang, Yan Solihin, Guru ...
ISCAPDCS
2001
15 years 13 days ago
End-user Tools for Application Performance Analysis Using Hardware Counters
One purpose of the end-user tools described in this paper is to give users a graphical representation of performance information that has been gathered by instrumenting an applica...
Kevin S. London, Jack Dongarra, Shirley Moore, Phi...