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» Parallel signal processing with S-Net
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SCAM
2005
IEEE
15 years 9 months ago
Control Flow Graph Reconstruction for Assembly Language Programs with Delayed Instructions
Most software for embedded systems, including digital signal processing systems, is coded in assembly language. For both understanding the software and for reverse compiling it to...
Nerina Bermudo, Andreas Krall, R. Nigel Horspool
170
Voted
CASES
2010
ACM
15 years 1 months ago
Mighty-morphing power-SIMD
In modern wireless devices, two broad classes of compute-intensive applications are common: those with high amounts of data-level parallelism, such as signal processing used in wi...
Ganesh S. Dasika, Mark Woh, Sangwon Seo, Nathan Cl...
115
Voted
IPPS
2007
IEEE
15 years 10 months ago
Pipelining Tradeoffs of Massively Parallel SuperCISC Hardware Functions
Parallel processing using multiple processors is a well-established technique to accelerate many different classes of applications. However, as the density of chips increases, ano...
Colin J. Ihrig, Justin Stander, Alex K. Jones
ICIP
2009
IEEE
16 years 4 months ago
Wavelet-based Parallel Mri Regularization Using Bivariate Sparsity Promoting Priors
Parallel magnetic resonance imaging (pMRI) using multiple receiver coils has emerged as a powerful 3D imaging technique for reducing scanning time or increasing image resolution. ...
104
Voted
ISCAS
2005
IEEE
124views Hardware» more  ISCAS 2005»
15 years 9 months ago
Parallel FFT computation with a CDMA-based network-on-chip
— Fast Fourier transform (FFT) algorithms are used in a wide variety of digital signal processing applications and many of these require high-performance parallel implementations...
Daewook Kim, Manho Kim, Gerald E. Sobelman