770 search results - page 40 / 154 » Parallel simulation of chip-multiprocessor architectures |
104
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ISHPC
1997
Springer
15 years 6 months ago
1997
Springer
We propose two resource management methods; a scheduling policy that re
ects resource consumption states and a memory-replacement strategy based on page classi cation under distrib...
112
Voted
CF
2007
ACM
15 years 5 months ago
2007
ACM
MppSoC is a SIMD architecture composed of a grid of processors and memories connected by a X-Net neighbourhood network and a general purpose global router. MppSoC is an evolution ...
115
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LCPC
2004
Springer
15 years 7 months ago
2004
Springer
Trimaran is an integrated compilation and performance monitoring infrastructure. The architecture space that Trimaran covers is characterized by HPL-PD, a parameterized processor a...
186
Voted
CONPAR
1994
15 years 6 months ago
1994
The Rewrite Rule Machine (RRM) is a massively parallel MIMD/SIMD computer designed with the explicit purpose of supporting veryhigh-level parallel programming with rewrite rules. T...
115
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PADS
1996
ACM
15 years 6 months ago
1996
ACM
Recently, a considerable amount of effort in the U.S. Department of Defense has been devoted to defining the High Level Architecture (HLA) for distributed simulations. This paper ...