47 search results - page 8 / 10 » Parallelizing HMMER for Hardware Acceleration on FPGAs |
103
Voted
FCCM
2009
IEEE
15 years 1 months ago
2009
IEEE
Artificial neural networks are a key tool for researchers attempting to understand and replicate the behaviour and intelligence found in biological neural networks. Software simul...
80
Voted
MAM
2006
14 years 9 months ago
2006
FPGA placement and routing is time consuming, often serving as the major obstacle inhibiting a fast edit-compile-test loop in prototyping and development and the major obstacle pr...
IPPS
2007
IEEE
15 years 3 months ago
2007
IEEE
With the rapid growth of computer networks and network infrastructures and increased dependency on the internet to carry out day-to-day activities, it is imperative that the compo...
85
Voted
ARC
2008
Springer
14 years 11 months ago
2008
Springer
As Field Programmable Gate Arrays (FPGAs) have reached capacities beyond millions of equivalent gates, it becomes possible to accelerate floating-point scientific computing applica...
122
click to vote
ARC
2010
Springer
15 years 4 months ago
2010
Springer
Computing the solution to a system of linear equations is a fundamental problem in scientific computing, and its acceleration has drawn wide interest in the FPGA community [1–3]...