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ISPD
1999
ACM
98views Hardware» more  ISPD 1999»
15 years 7 months ago
Towards synthetic benchmark circuits for evaluating timing-driven CAD tools
For the development and evaluation of CAD-tools for partitioning, floorplanning, placement, and routing of digital circuits, a huge amount of benchmark circuits with suitable cha...
Dirk Stroobandt, Peter Verplaetse, Jan Van Campenh...
IFIP
1999
Springer
15 years 7 months ago
Frontier: A Fast Placement System for FPGAs
In this paper we describe Frontier, an FPGA placement system that uses design macro-blocks in conjuction with a series of placement algorithms to achieve highly-routable and high-...
Russell Tessier
IPPS
1997
IEEE
15 years 7 months ago
Cyclic Networks: A Family of Versatile Fixed-Degree Interconnection Architectures
In this paper, we propose a new family of interconnection networks, called cyclic networks (CNs), in which an intercluster connection is defined on a set of nodes whose addresses...
Chi-Hsiang Yeh, Behrooz Parhami
DAC
1996
ACM
15 years 7 months ago
A Boolean Approach to Performance-Directed Technology Mapping for LUT-Based FPGA Designs
Abstract -- This paper presents a novel, Boolean approach to LUTbased FPGA technology mapping targeting high performance. As the core of the approach, we have developed a powerful ...
Christian Legl, Bernd Wurth, Klaus Eckl
DAC
1989
ACM
15 years 7 months ago
A New Approach to the Rectilinear Steiner Tree Problem
: We discuss a new approach to constructing the rectilinear Steiner tree (RST) of a given set of points in the plane, starting from a minimum spanning tree (MST). The main idea in ...
Jan-Ming Ho, Gopalakrishnan Vijayan, C. K. Wong