Sciweavers

338 search results - page 26 / 68
» Partitioning of VLSI Circuits and Systems
Sort
View
73
Voted
ICCAD
1996
IEEE
129views Hardware» more  ICCAD 1996»
15 years 1 months ago
Accurate interconnect modeling: towards multi-million transistor chips as microwave circuits
-- In this tutorial we discuss concepts and techniques for the accurate and efficient modeling and extraction of interconnect parasitics in VLSI designs. Due toincreasing operating...
N. P. van der Meijs, T. Smedes
69
Voted
DAC
1999
ACM
15 years 10 months ago
Hypergraph Partitioning with Fixed Vertices
We empirically assess the implications of fixed terminals for hypergraph partitioning heuristics. Our experimental testbed incorporates a leading-edge multilevel hypergraph partit...
Andrew E. Caldwell, Andrew B. Kahng, Igor L. Marko...
ICCAD
2003
IEEE
148views Hardware» more  ICCAD 2003»
15 years 6 months ago
Multi.Objective Hypergraph Partitioning Algorithms for Cut and Maximum Subdomain Degree Minimization
In this paper we present a family of multi-objective hypergraph partitioning algorithms based on the multilevel paradigm, which are capable of producing solutions in which both th...
Navaratnasothie Selvakkumaran, George Karypis
DFT
2006
IEEE
148views VLSI» more  DFT 2006»
14 years 11 months ago
Bilateral Testing of Nano-scale Fault-tolerant Circuits
As the technology enters the nano dimension, the inherent unreliability of nanoelectronics is making fault-tolerant architectures increasingly necessary in building nano systems. ...
Lei Fang, Michael S. Hsiao
ESA
2009
Springer
149views Algorithms» more  ESA 2009»
15 years 4 months ago
Sparse Cut Projections in Graph Streams
Finding sparse cuts is an important tool for analyzing large graphs that arise in practice, such as the web graph, online social communities, and VLSI circuits. When dealing with s...
Atish Das Sarma, Sreenivas Gollapudi, Rina Panigra...