Sciweavers

2652 search results - page 454 / 531
» Path Differentials and Applications
Sort
View
DAC
1996
ACM
15 years 8 months ago
Glitch Analysis and Reduction in Register Transfer Level
: We presentdesign-for-low-power techniques based on glitch reduction for register-transfer level circuits. We analyze the generation and propagation of glitches in both the contro...
Anand Raghunathan, Sujit Dey, Niraj K. Jha
ESA
1994
Springer
138views Algorithms» more  ESA 1994»
15 years 8 months ago
Efficient Construction of a Bounded Degree Spanner with Low Weight
Let S be a set of n points in IRd and let t > 1 be a real number. A t-spanner for S is a graph having the points of S as its vertices such that for any pair p, q of points ther...
Sunil Arya, Michiel H. M. Smid
FPGA
1992
ACM
176views FPGA» more  FPGA 1992»
15 years 8 months ago
Minimization of Permuted Reed-Muller Trees for Cellular Logic
The new family of Field Programmable Gate Arrays, CLI6000 from Concurrent Logic Inc realizes the truly Cellular Logic. It has been mainly designed for the realization of data path...
Li-Fei Wu, Marek A. Perkowski
GLVLSI
2007
IEEE
166views VLSI» more  GLVLSI 2007»
15 years 8 months ago
Efficient pipelining for modular multiplication architectures in prime fields
This paper presents a pipelined architecture of a modular Montgomery multiplier, which is suitable to be used in public key coprocessors. Starting from a baseline implementation o...
Nele Mentens, Kazuo Sakiyama, Bart Preneel, Ingrid...
FASE
2009
Springer
15 years 8 months ago
Interface Generation and Compositional Verification in JavaPathfinder
Abstract. We present a novel algorithm for interface generation of software components. Given a component, our algorithm uses learning techniques to compute a permissive interface ...
Dimitra Giannakopoulou, Corina S. Pasareanu