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CGO
2008
IEEE
15 years 10 months ago
Parallel-stage decoupled software pipelining
In recent years, the microprocessor industry has embraced chip multiprocessors (CMPs), also known as multi-core architectures, as the dominant design paradigm. For existing and ne...
Easwaran Raman, Guilherme Ottoni, Arun Raman, Matt...
IISWC
2008
IEEE
15 years 10 months ago
Characterizing and improving the performance of Intel Threading Building Blocks
Abstract— The Intel Threading Building Blocks (TBB) runtime library [1] is a popular C++ parallelization environment [2][3] that offers a set of methods and templates for creatin...
Gilberto Contreras, Margaret Martonosi
IPPS
2007
IEEE
15 years 10 months ago
Optimizing Inter-Nest Data Locality Using Loop Splitting and Reordering
With the increasing gap between processor speed and memory latency, the performance of data-dominated programs are becoming more reliant on fast data access, which can be improved...
Sofiane Naci
131
Voted
IPPS
2006
IEEE
15 years 10 months ago
A code motion technique for accelerating general-purpose computation on the GPU
Recently, graphics processing units (GPUs) are providing increasingly higher performance with programmable internal processors, namely vertex processors (VPs) and fragment process...
T. Ikeda, Fumihiko Ino, Kenichi Hagihara
122
Voted
PPOPP
2005
ACM
15 years 9 months ago
Scaling model checking of dataraces using dynamic information
Dataraces in multithreaded programs often indicate severe bugs and can cause unexpected behaviors when different thread interleavings are executed. Because dataraces are a cause f...
Ohad Shacham, Mooly Sagiv, Assaf Schuster