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CODES
2006
IEEE
15 years 10 months ago
Automatic generation of transaction level models for rapid design space exploration
Transaction-level modeling has been touted to improve simulation performance and modeling efficiency for early design space exploration. But no tools are available to generate suc...
Dongwan Shin, Andreas Gerstlauer, Junyu Peng, Rain...
CODES
2005
IEEE
15 years 9 months ago
Retargetable generation of TLM bus interfaces for MP-SoC platforms
In order to meet flexibility, performance and energy efficiency constraints, future SoC (System-on-Chip) designs will contain an increasing number of heterogeneous processor cor...
Andreas Wieferink, Rainer Leupers, Gerd Ascheid, H...
ISCC
2005
IEEE
119views Communications» more  ISCC 2005»
15 years 9 months ago
A Systematic Approach to Building High Performance Software-Based CRC Generators
—A framework for designing a family of novel fast CRC generation algorithms is presented. Our algorithms can ideally read arbitrarily large amounts of data at a time, while optim...
Michael E. Kounavis, Frank L. Berry
CODES
1999
IEEE
15 years 8 months ago
A flexible code generation framework for the design of application specific programmable processors
This paper introduces a flexible code generation framework dedicated to the design of application specific programmable processors. This tool allows the user to build specific com...
François Charot, Vincent Messé
ASPDAC
2005
ACM
103views Hardware» more  ASPDAC 2005»
15 years 6 months ago
MAIA: a framework for networks on chip generation and verification
- The increasing complexity of SoCs makes networks on chip (NoC) a promising substitute for busses and dedicated wires interconnection schemes. However, new tools need to be develo...
Luciano Ost, Aline Mello, José Palma, Ferna...