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DAC
2007
ACM
15 years 8 months ago
A Framework for the Validation of Processor Architecture Compliance
We present a framework for validating the compliance of a design with a given architecture. Our approach is centered on the concept of misinterpretations. These include missing be...
Allon Adir, Sigal Asaf, Laurent Fournier, Itai Jae...
DATE
2004
IEEE
109views Hardware» more  DATE 2004»
15 years 8 months ago
RTL Processor Synthesis for Architecture Exploration and Implementation
Architecture description languages are widely used to perform architecture exploration for application-driven designs, whereas the RT-level is the commonly accepted level for hard...
Oliver Schliebusch, Anupam Chattopadhyay, Rainer L...
DAC
1996
ACM
15 years 9 months ago
State Reduction Using Reversible Rules
We reduce the state explosion problem in automatic verification of finite-state systems by automatically collapsing subgraphs of the aph into abstract states. The key idea of the ...
C. Norris Ip, David L. Dill
147
Voted
ASPDAC
2006
ACM
119views Hardware» more  ASPDAC 2006»
15 years 11 months ago
A dynamic test compaction procedure for high-quality path delay testing
- We propose a dynamic test compaction procedure to generate high-quality test patterns for path delay faults. While the proposed procedure generates a compact two-pattern test set...
Masayasu Fukunaga, Seiji Kajihara, Xiaoqing Wen, T...
AIIDE
2007
15 years 7 months ago
A Demonstration of ScriptEase Motivational Ambient and Latent Behaviors for Computer RPGs
This demonstration describes the generation of ambient and latent NPC behavior scripts using generative behavior patterns with ScriptEase. Our behavior model supports behavior rol...
Maria Cutumisu, Duane Szafron, Jonathan Schaeffer,...