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» Performance Analysis Framework for Layout Analysis Methods
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SLIP
2009
ACM
16 years 29 days ago
Predicting the worst-case voltage violation in a 3D power network
This paper proposes an efficient method to predict the worst case of voltage violation by multi-domain clock gating in a three-dimensional (3D) on-chip power network considering l...
Wanping Zhang, Wenjian Yu, Xiang Hu, Amirali Shaya...
BMCBI
2008
98views more  BMCBI 2008»
15 years 6 months ago
Assessing probe-specific dye and slide biases in two-color microarray data
Background: A primary reason for using two-color microarrays is that the use of two samples labeled with different dyes on the same slide, that bind to probes on the same spot, is...
Ruixiao Lu, Geun-Cheol Lee, Michael Shultz, Chris ...
DAS
2010
Springer
15 years 5 months ago
Automatic unsupervised parameter selection for character segmentation
A major difficulty for designing a document image segmentation methodology is the proper value selection for all involved parameters. This is usually done after experimentations o...
Georgios Vamvakas, Nikolaos Stamatopoulos, Basilio...
BMCBI
2011
14 years 10 months ago
Biomarker Discovery and Redundancy Reduction towards Classification using a Multi-factorial MALDI-TOF MS T2DM Mouse Model Datase
Background: Diabetes like many diseases and biological processes is not mono-causal. On the one hand multifactorial studies with complex experimental design are required for its c...
Chris Bauer, Frank Kleinjung, Celia J. Smith, Mark...
MJ
2011
288views Multimedia» more  MJ 2011»
15 years 1 months ago
Emulation-based transient thermal modeling of 2D/3D systems-on-chip with active cooling
New tendencies envisage 2D/3D Multi-Processor System-On-Chip (MPSoC) as a promising solution for the consumer electronics market. MPSoCs are complex to design, as they must execute...
Pablo Garcia Del Valle, David Atienza