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» Performance Modelling of the Computational Hardware: A Stati...
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ISCA
1989
IEEE
120views Hardware» more  ISCA 1989»
15 years 4 months ago
Comparing Software and Hardware Schemes For Reducing the Cost of Branches
Pipelining has become a common technique to increase throughput of the instruction fetch, instruction decode, and instruction execution portions of modern computers. Branch instru...
Wen-mei W. Hwu, Thomas M. Conte, Pohua P. Chang
ARC
2010
Springer
138views Hardware» more  ARC 2010»
15 years 4 months ago
Space and Time Sharing of Reconfigurable Hardware for Accelerated Parallel Processing
High-Performance Reconfigurable Computers (HPRCs) are parallel machines consisting of FPGAs and microprocessors, with the FPGAs used as co-processors. The execution of parallel app...
Esam El-Araby, Vikram K. Narayana, Tarek A. El-Gha...
107
Voted
ECML
2007
Springer
15 years 6 months ago
Statistical Debugging Using Latent Topic Models
Abstract. Statistical debugging uses machine learning to model program failures and help identify root causes of bugs. We approach this task using a novel Delta-Latent-Dirichlet-Al...
David Andrzejewski, Anne Mulhern, Ben Liblit, Xiao...
ICIP
2006
IEEE
16 years 2 months ago
Light and Fast Statistical Motion Detection Method Based on Ergodic Model
In this paper, we propose a light and fast pixel-based statistical motion detection method based on a background subtraction procedure. The statistical representation of the backg...
Pierre-Marc Jodoin, Max Mignotte, Janusz Konrad
106
Voted
IPPS
2007
IEEE
15 years 7 months ago
Performance Studies of a WebSphere Application, Trade, in Scale-out and Scale-up Environments
Scale-out approach, in contrast to scale-up approach (exploring increasing performance by utilizing more powerful shared-memory servers), refers to deployment of applications on a...
Hao Yu, José E. Moreira, Parijat Dube, I-Hs...