2964 search results - page 308 / 593 » Performance Prediction of a Parallel Simulator |
147
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ISCAS
2003
IEEE
15 years 9 months ago
2003
IEEE
A massively scalable architecture for decoding low-density parity-check codes is presented in this paper. This novel architecture uses hardware scaling and memory partitioning to ...
142
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ISSS
1996
IEEE
15 years 8 months ago
1996
IEEE
The paper presents two heuristics for hardware/software partitioning of system level specifications. The main objective is to achieve performance optimization with a limited hardw...
126
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IPPS
2007
IEEE
15 years 10 months ago
2007
IEEE
Emerging heterogeneous multiprocessors will have custom memory and bus architectures that must balance resource sharing and system partitioning to meet cost constraints. We propos...
119
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IPPS
2005
IEEE
15 years 9 months ago
2005
IEEE
Common Language Infrastructure, or CLI, is a standardized virtual machine, which increasingly becomes popular on a wide range of platforms. In this paper we developed three I/O-in...
143
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IPPS
1999
IEEE
15 years 8 months ago
1999
IEEE
This paper presents efficient all-to-all broadcast algorithms for arbitrary irregular networks with switch-based wormhole interconnection and unicast message passing. First, all-t...