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ICS
2000
Tsinghua U.
15 years 8 months ago
Characterizing processor architectures for programmable network interfaces
The rapid advancements of networking technology have boosted potential bandwidth to the point that the cabling is no longer the bottleneck. Rather, the bottlenecks lie at the cros...
Patrick Crowley, Marc E. Fiuczynski, Jean-Loup Bae...
ICPP
1995
IEEE
15 years 8 months ago
Impact of Load Imbalance on the Design of Software Barriers
Software barriers have been designed and evaluated for barrier synchronization in large-scale shared-memory multiprocessors, under the assumption that all processorsreach the sync...
Alexandre E. Eichenberger, Santosh G. Abraham
DCOSS
2008
Springer
15 years 6 months ago
Frugal Sensor Assignment
When a sensor network is deployed in the field it is typically required to support multiple simultaneous missions, which may start and finish at different times. Schemes that match...
Matthew P. Johnson, Hosam Rowaihy, Diego Pizzocaro...
EUROPAR
2010
Springer
15 years 5 months ago
Thread Owned Block Cache: Managing Latency in Many-Core Architecture
Abstract. Shared last level cache is crucial to performance. However, multithread program model incurs serious contention in shared cache. In this paper, to reduce average cache ac...
Fenglong Song, Zhiyong Liu, Dongrui Fan, Hao Zhang...
GRID
2006
Springer
15 years 4 months ago
Applying Peer-to-Peer Techniques to Grid Replica Location Services
Peer-to-peer systems offer attractive system management properties, including the ability of components that join the network to self-organize; scalability up to tens of thousands...
Ann L. Chervenak, Min Cai