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» Performance Studies of a Parallel Prolog Architecture
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VLSID
2007
IEEE
133views VLSI» more  VLSID 2007»
15 years 11 months ago
On the Impact of Address Space Assignment on Performance in Systems-on-Chip
Today, VLSI systems for computationally demanding applications are being built as Systems-on-Chip (SoCs) with a distributed memory sub-system which is shared by a large number of ...
G. Hazari, Madhav P. Desai, H. Kasture
ISCA
1990
IEEE
186views Hardware» more  ISCA 1990»
15 years 2 months ago
Adaptive Software Cache Management for Distributed Shared Memory Architectures
An adaptive cache coherence mechanism exploits semantic information about the expected or observed access behavior of particular data objects. We contend that, in distributed shar...
John K. Bennett, John B. Carter, Willy Zwaenepoel
ASAP
2008
IEEE
146views Hardware» more  ASAP 2008»
15 years 5 months ago
A multi-FPGA application-specific architecture for accelerating a floating point Fourier Integral Operator
Many complex systems require the use of floating point arithmetic that is exceedingly time consuming to perform on personal computers. However, floating point operators are also h...
Jason Lee, Lesley Shannon, Matthew J. Yedlin, Gary...
IPPS
2002
IEEE
15 years 3 months ago
Architecture of the Entropia Distributed Computing System
Distributed Computing, the exploitation of idle cycles on pervasive desktop PC systems offers the opportunity to increase the available computing power by orders of magnitude (10x...
Andrew A. Chien
IPPS
2007
IEEE
15 years 4 months ago
Optimized Inverted List Assignment in Distributed Search Engine Architectures
We study efficient query processing in distributed web search engines with global index organization. The main performance bottleneck in this case is due to the large amount of i...
Jiangong Zhang, Torsten Suel