285 search results - page 21 / 57 » Performance and Functional Verification of Microprocessors |
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ERSA
2009
14 years 7 months ago
2009
Abstract-- The paper presents the implementation of nonlinear least-squares regression in a Field Programmable Gate Array (FPGA) device. The implemented algorithm is very performan...
FLAIRS
2001
14 years 11 months ago
2001
In this paper, we argue that KBS validation should not be limited to testing functional properties of the system, such as its input - output behavior, but must also address its dy...
DAC
2007
ACM
15 years 10 months ago
2007
ACM
Static worst-case execution time (WCET) analysis is done by modeling the hardware behavior. In this paper we describe a WCET analysis technique to analyze systems with function ca...
ICS
1999
Tsinghua U.
15 years 1 months ago
1999
Tsinghua U.
Instruction scheduling is an important compiler technique for exploiting more instruction-level parallelism (ILP) in high-performance microprocessors, and in this paper, we study ...
ISCAPDCS
2001
14 years 11 months ago
2001
One purpose of the end-user tools described in this paper is to give users a graphical representation of performance information that has been gathered by instrumenting an applica...