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147
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ISCA
1993
IEEE
15 years 9 months ago
1993
IEEE
We evaluate the e ect of processor speed, network bandwidth, and software overhead on the performance of release-consistent software distributed shared memory. We examine ve di er...
162
Voted
SIPS
2006
IEEE
15 years 11 months ago
2006
IEEE
Low-Density Parity-Check (LDPC) codes have been adopted in the physical layer of many communication systems because of their superior performance. The direct implementation of the...
124
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CSSE
2008
IEEE
15 years 11 months ago
2008
IEEE
Instruction-Set Simulators (ISS) are indispensable tools for studying new architectures. There are several alternatives to achieve instruction set simulation, such as interpretive...
176
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CISIS
2009
IEEE
2009
IEEE
Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints
15 years 11 months ago
—Regular multi-core processors are appearing in the embedded system market as high performance software programmable solutions. The use of regular interconnect fabrics for them a...
128
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ITCC
2003
IEEE
15 years 10 months ago
2003
IEEE
In this paper, we propose a software architecture model for the development of elaboration/transcoding modules for structured data. We define a flexible implementation approach ...