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EUROPAR
1999
Springer
15 years 8 months ago
An Evaluation of High Performance Fortran Compilers Using the HPFBench Benchmark Suite
Abstract. The High Performance Fortran (HPF) benchmark suite HPFBench was designed for evaluating the HPF language and compilers on scalable architectures. The functionality of the...
Guohua Jin, Y. Charlie Hu
ICRA
2009
IEEE
148views Robotics» more  ICRA 2009»
15 years 2 months ago
Dynamic path planning with multi-agent data fusion - The Parallel Hierarchical Replanner
The design of a hierarchical planning system in which each level operates in parallel and communicates asynchronously is presented. It is shown that this Parallel Hierarchical Repl...
Thomas Allen, Andrew Hill, James Patrick Underwood...
ISHPC
2003
Springer
15 years 9 months ago
Performance Study of a Whole Genome Comparison Tool on a Hyper-Threading Multiprocessor
We developed a multithreaded parallel implementation of a sequence alignment algorithm that is able to align whole genomes with reliable output and reasonable cost. This paper pres...
Juan del Cuvillo, Xinmin Tian, Guang R. Gao, Milin...
IPPS
2007
IEEE
15 years 10 months ago
Design Alternatives for a High-Performance Self-Securing Ethernet Network Interface
This paper presents and evaluates a strategy for integrating the Snort network intrusion detection system into a high-performance programmable Ethernet network interface card (NIC...
Derek L. Schuff, Vijay S. Pai
HPCA
2001
IEEE
16 years 4 months ago
Data-Flow Prescheduling for Large Instruction Windows in Out-of-Order Processors
The performance of out-of-order processors increases with the instruction window size. In conventional processors, the effective instruction window cannot be larger than the issue...
Pierre Michaud, André Seznec