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IPPS
2006
IEEE
15 years 11 months ago
Performance evaluation of wormhole routed network processor-memory interconnects
Network line cards are experiencing ever increasing line rates, random data bursts, and limited space. Hence, they are more vulnerable than other processormemory environments, to ...
Taskin Koçak, Jacob Engel
IPPS
2006
IEEE
15 years 11 months ago
Performance evaluation of supercomputers using HPCC and IMB benchmarks
The HPC Challenge (HPCC) benchmark suite and the Intel MPI Benchmark (IMB) are used to compare and evaluate the combined performance of processor, memory subsystem and interconnec...
Subhash Saini, Robert Ciotti, Brian T. N. Gunney, ...
IPPS
2000
IEEE
15 years 9 months ago
Predicting Performance on SMPs. A Case Study: The SGI Power Challenge
We study the issue of performance prediction on the SGIPower Challenge, a typical SMP. On such a platform, the cost of memory accesses depends on their locality and on contention ...
Nancy M. Amato, Jack Perdue, Mark M. Mathis, Andre...
IPPS
2007
IEEE
15 years 11 months ago
A Multi-Level Parallel Implementation of a Program for Finding Frequent Patterns in a Large Sparse Graph
Graphs capture the essential elements of many problems broadly defined as searching or categorizing. With the rapid increase of data volumes from sensors, many application discipl...
Steve Reinhardt, George Karypis
IPPS
2005
IEEE
15 years 10 months ago
Enhancing NIC Performance for MPI using Processing-in-Memory
Processing-in-Memory (PIM) technology encompasses a range of research leveraging a tight coupling of memory and processing. The most unique features of the technology are extremel...
Arun Rodrigues, Richard C. Murphy, Ron Brightwell,...