Sciweavers

3321 search results - page 654 / 665
» Performance of parallel computations with dynamic processor ...
Sort
View
IEEEPACT
2008
IEEE
16 years 13 days ago
Leveraging on-chip networks for data cache migration in chip multiprocessors
Recently, chip multiprocessors (CMPs) have arisen as the de facto design for modern high-performance processors, with increasing core counts. An important property of CMPs is that...
Noel Eisley, Li-Shiuan Peh, Li Shang
FPGA
2006
ACM
195views FPGA» more  FPGA 2006»
15 years 9 months ago
An adaptive Reed-Solomon errors-and-erasures decoder
The development of Reed-Solomon (RS) codes has allowed for improved data transmission over a variety of communication media. Although Reed-Solomon decoding provides a powerful def...
Lilian Atieno, Jonathan Allen, Dennis Goeckel, Rus...
IEEEPACT
2008
IEEE
16 years 13 days ago
Adaptive insertion policies for managing shared caches
Chip Multiprocessors (CMPs) allow different applications to concurrently execute on a single chip. When applications with differing demands for memory compete for a shared cache, ...
Aamer Jaleel, William Hasenplaugh, Moinuddin K. Qu...
180
Voted
ISORC
2007
IEEE
16 years 9 days ago
QoS Management of Real-Time Data Stream Queries in Distributed Environments
Many emerging applications operate on continuous unbounded data streams and need real-time data services. Providing deadline guarantees for queries over dynamic data streams is a ...
Yuan Wei, Vibha Prasad, Sang Hyuk Son
ICPADS
2006
IEEE
16 years 1 days ago
On-line Evolutionary Resource Matching for Job Scheduling in Heterogeneous Grid Environments
In this paper, we describe a resource matcher (RM) developed for the on-line resource matching in heterogeneous grid environments. RM is based on the principles of Evolutionary Al...
Vijay K. Naik, Pawel Garbacki, Krishna Kummamuru, ...