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IEEEPACT
2003
IEEE
15 years 2 months ago
Resolving Register Bank Conflicts for a Network Processor
This paper discusses a register bank assignment problem for a popular network processor--Intel's IXP. Due to limited data paths, the network processor has a restriction that ...
Xiaotong Zhuang, Santosh Pande
115
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ISCAPDCS
2008
14 years 11 months ago
Parallel Embedded Systems: Where Real-Time and Low-Power Meet
This paper introduces a combination of models and proofs for optimal power management via Dynamic Frequency Scaling and Dynamic Voltage Scaling. The approach is suitable for syste...
Zdravko Karakehayov, Yu Guo
IPPS
2007
IEEE
15 years 3 months ago
Modeling of NAMD's Network Input/Output on Large PC Clusters
This study examined the interplay among processor speed, cluster interconnect and file I/O, using parallel applications to quantify interactions. We focused on a common case wher...
Nancy Tran, Daniel A. Reed
HPDC
2003
IEEE
15 years 2 months ago
Trace-Based Simulations of Processor Co-Allocation Policies in Multiclusters
In systems consisting of multiple clusters of processors which employ space sharing for scheduling jobs, such as our Distributed ASCI1 Supercomputer (DAS), coallocation, i.e., the...
Anca I. D. Bucur, Dick H. J. Epema
87
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CGO
2006
IEEE
15 years 3 months ago
Constructing Virtual Architectures on a Tiled Processor
As the amount of available silicon resources on one chip increases, we have seen the advent of ever increasing parallel resources integrated on-chip. Many architectures use these ...
David Wentzlaff, Anant Agarwal