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HPCA
1998
IEEE
15 years 1 months ago
PRISM: An Integrated Architecture for Scalable Shared Memory
This paper describes PRISM, a distributed sharedmemory architecture that relies on a tightly integrated hardware and operating system design for scalable and reliable performance....
Kattamuri Ekanadham, Beng-Hong Lim, Pratap Pattnai...
HPDC
2010
IEEE
14 years 10 months ago
Biocompute: towards a collaborative workspace for data intensive bio-science
The explosion of data in the biological community demands the development of more scalable and flexible portals for bioinformatic computation. To address this need, we put forth c...
Rory Carmichael, Patrick Braga-Henebry, Douglas Th...
ICPPW
2009
IEEE
14 years 7 months ago
Improvement of Messages Delivery Time on Vehicular Delay-Tolerant Networks
Vehicular Delay-Tolerant Networks (VDTNs) are an application of the Delay-Tolerant Network (DTN) concept, where the movement of vehicles and their message relaying service is used ...
Vasco Nuno da Gama de Jesus Soares, Joel Jos&eacut...
SENSYS
2009
ACM
15 years 4 months ago
The case for a network protocol isolation layer
Network protocols are typically designed and tested individually. In practice, however, applications use multiple protocols concurrently. This discrepancy can lead to failures fro...
Jung Il Choi, Maria A. Kazandjieva, Mayank Jain, P...
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
15 years 3 months ago
A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design
Power delivery is a growing reliability concern in microprocessors as the industry moves toward feature-rich, powerhungrier designs. To battle the ever-aggravating power consumpti...
Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hs...