This paper presents methods for efficient power minimization at circuit and micro-architectural levels. The potential energy savings are strongly related to the energy profile of ...
Robert W. Brodersen, Mark Horowitz, Dejan Markovic...
This paper presents the sizing rules method for analog CMOS circuit design that consists of: first, the development of a hierarchical library of transistor pair groups as basic b...
Helmut E. Graeb, Stephan Zizala, Josef Eckmueller,...
The small physical size of mobile devices imposes dramatic restrictions on the user interface (UI). With the ever increasing capacity of these devices as well as access to large o...
Guy Shani, Christopher Meek, Tim Paek, Bo Thiesson...
Deep submicron processes have allowed FPGAs to grow in complexity and speed. However, such technology scaling has caused FPGAs to become more susceptible to the effects of process...
We describe an interactive system featuring fluid-driven animation that responds to moving objects. Our system includes a GPUaccelerated Eulerian fluid solver that is suited for...