1189 search results - page 146 / 238 » Pipeline Timing Analysis Using a Trace-Driven Simulator |
137
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ISCC
2009
IEEE
15 years 11 months ago
2009
IEEE
Abstract—This paper presents a novel scalable switching architecture for input queued switches with its proper arbitration algorithms. In contrast to traditional switching archit...
152
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CODES
2008
IEEE
15 years 11 months ago
2008
IEEE
The combination of flit-buffer flow control methods and latency-insensitive protocols is an effective solution for networks-on-chip (NoC). Since they both rely on backpressure...
145
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ISCAS
2003
IEEE
15 years 9 months ago
2003
IEEE
We present an equation-based transistor size optimizer that minimizes delay of custom circuits. Our method uses static timing analysis to find the critical paths and numerical met...
156
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TC
2010
15 years 2 months ago
2010
—Switched networks have been adopted in on-chip communication for their scalability and efficient resource sharing. However, using a general network for a specific domain may res...
109
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LCN
2006
IEEE
15 years 10 months ago
2006
IEEE
This paper deals with voice communication models for disaster area scenarios. The goal is to design models that can be used to generate realistic push to talk traffic for single ...