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» Pipeline Timing Analysis Using a Trace-Driven Simulator
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ICCAD
2006
IEEE
101views Hardware» more  ICCAD 2006»
15 years 8 months ago
A unified non-rectangular device and circuit simulation model for timing and power
— For 65nm and below devices, even after optical proximity correction (OPC), the gate may still be non-rectangular. There are several limited works on the device and circuit char...
Sean X. Shi, Peng Yu, David Z. Pan
IPPS
1998
IEEE
15 years 4 months ago
Predicting the Running Times of Parallel Programs by Simulation
Predicting the running time of a parallel program is useful for determining the optimal values for the parameters of the implementation and the optimal mapping of data on processo...
Radu Rugina, Klaus E. Schauser
ISCA
2012
IEEE
243views Hardware» more  ISCA 2012»
13 years 2 months ago
Lane decoupling for improving the timing-error resiliency of wide-SIMD architectures
A significant portion of the energy dissipated in modern integrated circuits is consumed by the overhead associated with timing guardbands that ensure reliable execution. Timing ...
Evgeni Krimer, Patrick Chiang, Mattan Erez
SIGMETRICS
2002
ACM
14 years 11 months ago
Full-system timing-first simulation
Computer system designers often evaluate future design alternatives with detailed simulators that strive for functional fidelity (to execute relevant workloads) and performance fi...
Carl J. Mauer, Mark D. Hill, David A. Wood
ICPADS
2007
IEEE
15 years 6 months ago
Supporting deadline monotonic policy over 802.11 average service time analysis
In this paper, we propose a real time scheduling policy over 802.11 DCF protocol called Deadline Monotonic (DM). We evaluate the performance of this policy for a simple scenario w...
Inès El Korbi, Leïla Azouz Saïdan...