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ICCD
2003
IEEE
129views Hardware» more  ICCD 2003»
15 years 7 months ago
Reducing dTLB Energy Through Dynamic Resizing
Translation Look-aside Buffer (TLB), which is small Content Addressable Memory (CAM) structure used to translate virtual addresses to physical addresses, can consume significant ...
Victor Delaluz, Mahmut T. Kandemir, Anand Sivasubr...
ICCAD
2007
IEEE
87views Hardware» more  ICCAD 2007»
15 years 7 months ago
Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design
—Register allocation, in high-level synthesis and ASIP design, is the process of determining the number of registers to include in the resulting circuit or processor. The goal is...
Philip Brisk, Ajay K. Verma, Paolo Ienne
ICCAD
2003
IEEE
98views Hardware» more  ICCAD 2003»
15 years 7 months ago
Achieving Design Closure Through Delay Relaxation Parameter
Current design automation methodologies are becoming incapable of achieving design closure especially in the presence of deep submicron effects. This paper addresses the issue of ...
Ankur Srivastava, Seda Ogrenci Memik, Bo-Kyung Cho...
TEI
2010
ACM
125views Hardware» more  TEI 2010»
15 years 5 months ago
FlyEye: grasp-sensitive surfaces using optical fiber
This paper presents a method for prototyping grasp-sensitive surfaces using optical fibers. In this system one end of a fiber bundle is attached to an image sensor. The other en...
Raphael Wimmer
TEI
2010
ACM
257views Hardware» more  TEI 2010»
15 years 5 months ago
Traditional games meet ICT: a case study on go game augmentation
While pervasive technologies explore new gaming styles, traditional games, such as cards and tabletop games are still appealing and have various irreplaceable flavors. We point ou...
Takahiro Iwata, Tetsuo Yamabe, Mikko Polojärv...