1419 search results - page 4 / 284 » Power Droop Testing |
169
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ICCD
2003
IEEE
15 years 10 months ago
2003
IEEE
Excessive switching activity during shift cycles in scan-based cores imposes considerable test power challenges. To ensure rapid and reliable test of SOCs, we propose a scan chain...
149
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DSD
2005
IEEE
15 years 10 months ago
2005
IEEE
1 This paper presents a method for power-constrained system-on-chip test scheduling in an abort-on-first-fail environment where the test is terminated as soon as a fault is detecte...
133
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MTV
2007
IEEE
15 years 11 months ago
2007
IEEE
Test vector ordering is recognized as a simple and non-intrusive approach to assist test power reduction. Simulation based test vector ordering approach to minimize circuit transit...
177
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CSDA
2011
14 years 12 months ago
2011
: A multiple test procedure for assessing multivariate normality (MVN) that combines a finite set of affine invariant test statistics for MVN is proposed. This combination is base...