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BMCBI
2006
90views more  BMCBI 2006»
15 years 16 days ago
The PowerAtlas: a power and sample size atlas for microarray experimental design and research
Background: Microarrays permit biologists to simultaneously measure the mRNA abundance of thousands of genes. An important issue facing investigators planning microarray experimen...
Grier P. Page, Jode W. Edwards, Gary L. Gadbury, P...
60
Voted
VLSID
2004
IEEE
85views VLSI» more  VLSID 2004»
16 years 26 days ago
An Area-Efficient Router for the Data-Intensive Architecture (DIVA) System
A key component of the Data-Intensive Architecture (DIVA) is the Processing-In-Memory (PIM) Routing Component (PiRC) that is responsible for efficient communication between PIM ch...
Sumit D. Mediratta, Jeff Sondeen, Jeffrey T. Drape...
109
Voted
NSDI
2008
15 years 2 months ago
Efficiency Through Eavesdropping: Link-layer Packet Caching
The broadcast nature of wireless networks is the source of both their utility and much of their complexity. To turn what would otherwise be unwanted interference into an advantage...
Mikhail Afanasyev, David G. Andersen, Alex C. Snoe...
116
Voted
VLSISP
2008
147views more  VLSISP 2008»
14 years 11 months ago
Data Reuse Exploration for Low Power Motion Estimation Architecture Design in H.264 Encoder
Data access usually leads to more than 50% of the power cost in a modern signal processing system. To realize a low-power design, how to reduce the memory access power is a critica...
Yu-Han Chen, Tung-Chien Chen, Chuan-Yung Tsai, Sun...
162
Voted
ISCA
2012
IEEE
262views Hardware» more  ISCA 2012»
13 years 2 months ago
Boosting mobile GPU performance with a decoupled access/execute fragment processor
Smartphones represent one of the fastest growing markets, providing significant hardware/software improvements every few months. However, supporting these capabilities reduces the...
Jose-Maria Arnau, Joan-Manuel Parcerisa, Polychron...