462 search results - page 46 / 93 » Power Efficient Data Cache Designs |
112
Voted
DAC
2000
ACM
16 years 1 months ago
2000
ACM
In this paper we describe an area efficient power minimization scheme "Control Generated ClockingI` that saves significant amounts of power in datapath registers and clock dr...
151
Voted
AHS
2007
IEEE
15 years 7 months ago
2007
IEEE
In this paper, we present a low power implementation of H.264 adaptive deblocking filter (DBF) algorithm on ARM Versatile / PB926EJ-S Development Board. The DBF hardware is implem...
ICCAD
1999
IEEE
15 years 4 months ago
1999
IEEE
Dynamic Power Management (DPM) is a technique to reduce power consumption of electronic systems by selectively shutting down idle components. The quality of the shutdown control a...
103
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ISCA
2003
IEEE
15 years 5 months ago
2003
IEEE
Debuggers have been proven indispensable in improving software reliability. Unfortunately, on most real-life software, debuggers fail to deliver their most essential feature — a...
107
Voted
IPPS
2007
IEEE
15 years 6 months ago
2007
IEEE
This paper presents and evaluates a strategy for integrating the Snort network intrusion detection system into a high-performance programmable Ethernet network interface card (NIC...