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CSSE
2008
IEEE
15 years 1 months ago
A Power-Efficient Floating-Point Co-processor Design
According to dramatically growing interesting in power-efficient embedded processor, designers must establish the proper power strategy when they design new embedded processor core...
Xunying Zhang, Xubang Shen
VLSID
2008
IEEE
133views VLSI» more  VLSID 2008»
15 years 12 months ago
Exhaustive Enumeration of Legal Custom Instructions for Extensible Processors
Today's customizable processors allow the designer to augment the base processor with custom accelerators. By choosing appropriate set of accelerators, designer can significa...
Nagaraju Pothineni, Anshul Kumar, Kolin Paul
ASPDAC
2006
ACM
140views Hardware» more  ASPDAC 2006»
15 years 5 months ago
A cycle accurate power estimation tool
- Power consumption is one of the major challenges in VLSI Design. Power constrained designs need tools to accurately predict the power consumption and provide feedback to designer...
Rajat Chaudhry, Daniel L. Stasiak, Stephen D. Posl...
DAC
2006
ACM
15 years 5 months ago
Hierarchical power distribution and power management scheme for a single chip mobile processor
A hierarchical power distribution methodology that enables more than dozen power domains in a chip and a power management scheme using 20 power domains are described. This method ...
Toshihiro Hattori, Takahiro Irita, Masayuki Ito, E...
IPPS
2006
IEEE
15 years 5 months ago
A multiprocessor architecture for the massively parallel model GCA
The GCA (Global Cellular Automata) model consists of a collection of cells which change their states synchronously depending on the states of their neighbors like in the classical...
Wolfgang Heenes, Rolf Hoffmann, Johannes Jendrsczo...