1238 search results - page 82 / 248 » Power Efficient Processor Architecture and The Cell Processo... |
VLSID
2007
IEEE
16 years 6 days ago
2007
IEEE
We present a technique for automatic verification of pipelined microprocessors using model checking. Antecedent conditioned slicing is an efficient abstraction technique for hardw...
112
click to vote
CAL
2005
14 years 11 months ago
2005
This paper shows that if the execution of a program is divided into distinct intervals, it is possible for one processor or configuration to provide the best power efficiency over ...
IPPS
2007
IEEE
15 years 6 months ago
2007
IEEE
Due to fundamental physical limitations and power constraints, we are witnessing a radical change in commodity microprocessor architectures to multicore designs. Continued perform...
121
click to vote
ISCAS
2011
IEEE
14 years 3 months ago
2011
IEEE
Abstract— Multi-core processors are about to conquer embedded systems — it is not the question of whether they are coming but how the architectures of the microcontrollers shou...
109
click to vote
FPGA
2008
ACM
15 years 1 months ago
2008
ACM
The currently accepted method of accelerating applications in FPGA soft processor systems is to design a custom hardware accelerator. This paper suggests the alternative approach ...