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» Power Macromodeling for High Level Power Estimation
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ISVLSI
2008
IEEE
191views VLSI» more  ISVLSI 2008»
15 years 4 months ago
NoC Power Estimation at the RTL Abstraction Level
Guilherme Guindani, Cezar Reinbrecht, Thiago Raupp...
ICCD
1999
IEEE
64views Hardware» more  ICCD 1999»
15 years 1 months ago
Power Estimation of System-Level Buses for Microprocessor-Based Architectures: A Case Study
William Fornaciari, Donatella Sciuto, Cristina Sil...
ICCAD
2003
IEEE
142views Hardware» more  ICCAD 2003»
15 years 6 months ago
SuPREME: Substrate and Power-delivery Reluctance-Enhanced Macromodel Evaluation
The recent demand for system-on-chip RF mixed-signal design and aggressive supply-voltage reduction require chip-level accurate analysis of both the substrate and power delivery s...
Tsung-Hao Chen, Clement Luk, Charlie Chung-Ping Ch...
DATE
1999
IEEE
81views Hardware» more  DATE 1999»
15 years 1 months ago
A Power Estimation Model for High-Speed CMOS A/D Converters
Power estimation is important for system-level exploration and trade-off analysis of VLSI systems. A power estimator for high-speed analog to digital converters that exploits info...
Erik Lauwers, Georges G. E. Gielen
ISLPED
1996
ACM
101views Hardware» more  ISLPED 1996»
15 years 1 months ago
High-level power estimation
The growing demand for portable electronic devices has led to an increased emphasis on power consumption within the semiconductor industry. As a result, designers are now encourag...
Paul E. Landman