173 search results - page 21 / 35 » Power Reducing Techniques for Clocked CMOS PLAs |
MICRO
2003
IEEE
15 years 2 months ago
2003
IEEE
Energy-efficient processor design is becoming more and more important with technology scaling and with high performance requirements. Supply-voltage scaling is an efficient way to...
78
Voted
TVLSI
2008
14 years 9 months ago
2008
Data stability of SRAM cells has become an important issue with the scaling of CMOS technology. Memory banks are also important sources of leakage since the majority of transistors...
CODES
2008
IEEE
15 years 4 months ago
2008
IEEE
Adaptive Body Biasing (ABB) is a popularly used technique to mitigate the increasing impact of manufacturing process variations on leakage power dissipation. The efficacy of the ...
EMSOFT
2005
Springer
15 years 3 months ago
2005
Springer
We present AutoDVS, a dynamic voltage scaling (DVS) system for hand-held computers. Unlike extant DVS systems, AutoDVS distinguishes common, course-grain, program behavior and cou...
ISQED
2006
IEEE
15 years 3 months ago
2006
IEEE
— A new low voltage swing circuit technique based on a dual threshold voltage CMOS technology is presented in this paper for simultaneously reducing active and standby mode power...