115 search results - page 5 / 23 » Power analysis of system-level on-chip communication archite... |
130
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CODES
2004
IEEE
15 years 3 months ago
2004
IEEE
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
118
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INTEGRATION
2008
14 years 11 months ago
2008
With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor SystemsOn-Chip (MPSoCs) consisting of complex integrated component...
DATE
2003
IEEE
15 years 5 months ago
2003
IEEE
The specification on power consumption of a digital system is extremely important due to the growing relevance of the market of portable devices and must be taken into account sin...
176
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BWCCA
2010
14 years 6 months ago
2010
Network-on-Chip (NoC) architectures provide a good way of realizing efficient interconnections and largely alleviate the limitations of bus-based solutions. NoC has emerged as a so...
101
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ICCD
2005
IEEE
15 years 8 months ago
2005
IEEE
Recent advances in Dynamic Power Management (DPM) techniques have resulted in designs that support a rich set of power management options, both at the hardware and software levels...