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» Power and performance optimization at the system level
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ICCV
2009
IEEE
15 years 3 months ago
Associative hierarchical CRFs for object class image segmentation
Most methods for object class segmentation are formulated as a labelling problem over a single choice of quantisation of an image space - pixels, segments or group of segments. It...
Lubor Ladicky, Christopher Russell, Pushmeet Kohli...
FCCM
2009
IEEE
190views VLSI» more  FCCM 2009»
16 years 24 days ago
Optical Flow on the Ambric Massively Parallel Processor Array (MPPA)
The Ambric Massively Parallel Processor Array (MPPA) is a device that contains 336 32-bit RISC processors and is appropriate for embedded systems due to its relatively small physi...
Brad L. Hutchings, Brent E. Nelson, Stephen West, ...
ASPDAC
2012
ACM
253views Hardware» more  ASPDAC 2012»
14 years 1 months ago
An integrated and automated memory optimization flow for FPGA behavioral synthesis
Behavioral synthesis tools have made significant progress in compiling high-level programs into register-transfer level (RTL) specifications. But manually rewriting code is still ...
Yuxin Wang, Peng Zhang, Xu Cheng, Jason Cong
BROADNETS
2006
IEEE
16 years 3 days ago
Transparent Optimization of Grid Server Selection With Real-Time Passive Network Measurements
Grid services have tremendously simplified the programming challenges in leveraging large-scale distributed comAt the same time, the increased level of abstraction reduces the op...
Marcia Zangrilli, Bruce Lowekamp
CADE
1998
Springer
15 years 10 months ago
System Description: card TAP: The First Theorem Prover on a Smart Card
Abstract. We present the first implementation of a theorem prover running on a smart card. The prover is written in Java and implements a dual tableau calculus. Due to the limited ...
Rajeev Goré, Joachim Posegga, Andrew Slater...