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» Power and performance optimization at the system level
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IPPS
2007
IEEE
15 years 6 months ago
SWARM: A Parallel Programming Framework for Multicore Processors
Due to fundamental physical limitations and power constraints, we are witnessing a radical change in commodity microprocessor architectures to multicore designs. Continued perform...
David A. Bader, Varun Kanade, Kamesh Madduri
IPPS
2007
IEEE
15 years 6 months ago
Scalable Distributed Execution Environment for Large Data Visualization
To use heterogeneous and geographically distributed resources as a platform for parallel visualization is an intriguing topic of research. This is because of the immense potential...
Micah Beck, Huadong Liu, Jian Huang, Terry Moore
ICRA
2006
IEEE
81views Robotics» more  ICRA 2006»
15 years 6 months ago
Organized Motion Control of a lot of Microorganisms using Visual Feedback
Abstract— We propose a novel method to control a lot of microorganisms by using visual feedback for micro-robotic application. Our goal is to control a cluster of microorganisms ...
Kiyonori Takahashi, Naoko Ogawa, Hiromasa Oku, Koi...
DATE
2010
IEEE
168views Hardware» more  DATE 2010»
15 years 5 months ago
A new placement algorithm for the mitigation of multiple cell upsets in SRAM-based FPGAs
Modern FPGAs have been designed with advanced integrated circuit techniques that allow high speed and low power performance, joined to reconfiguration capabilities. This makes new...
Luca Sterpone, Niccolò Battezzati
DATE
2004
IEEE
109views Hardware» more  DATE 2004»
15 years 3 months ago
RTL Processor Synthesis for Architecture Exploration and Implementation
Architecture description languages are widely used to perform architecture exploration for application-driven designs, whereas the RT-level is the commonly accepted level for hard...
Oliver Schliebusch, Anupam Chattopadhyay, Rainer L...