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DATE
2007
IEEE
102views Hardware» more  DATE 2007»
15 years 6 months ago
Efficient testbench code synthesis for a hardware emulator system
: - The rising complexity of modern embedded systems is causing a significant increase in the verification effort required by hardware designers and software developers, leading to...
Ioannis Mavroidis, Ioannis Papaefstathiou
ISLPED
1997
ACM
114views Hardware» more  ISLPED 1997»
15 years 3 months ago
Cycle-accurate macro-models for RT-level power analysis
 In this paper we present a methodology and techniques for generating cycle-accurate macro-models for RTlevel power analysis. The proposed macro-model predicts not only...
Qinru Qiu, Qing Wu, Massoud Pedram, Chih-Shun Ding
IPPS
2003
IEEE
15 years 5 months ago
System-Level Modeling of Dynamically Reconfigurable Hardware with SystemC
To cope with the increasing demand for higher computational power and flexibility, dynamically reconfigurable blocks become an important part inside a system-on-chip. Several meth...
Antti Pelkonen, Kostas Masselos, Miroslav Cup&aacu...
ISCAS
2006
IEEE
119views Hardware» more  ISCAS 2006»
15 years 5 months ago
Finite state machine state assignment for area and power minimization
— In this paper, we address the problem of FSM state assignment to minimize area and power. The objectives are targeted as single/independent as well as multi-objective optimizat...
Aiman H. El-Maleh, Sadiq M. Sait, F. Nawaz Khan
100
Voted
FPL
2009
Springer
115views Hardware» more  FPL 2009»
15 years 4 months ago
Recursion in reconfigurable computing: A survey of implementation approaches
Reconfigurable systems are widely used nowadays to increase performance of computationally intensive applications. There exist a lot of synthesis tools that automatically generate...
Iouliia Skliarova, Valery Sklyarov