318 search results - page 17 / 64 » Power minimization for dynamic PLAs |
ICCD
2007
IEEE
15 years 1 months ago
2007
IEEE
This paper presents a novel power reduction method for chip multi-processors (CMPs) under real-time constraints. While the power consumption of processing units (PUs) on CMPs can ...
CN
2007
14 years 9 months ago
2007
— Energy efficient operation is of paramount importance for battery-powered wireless nodes. In an effort to conserve energy, standard protocols for WLANs have the provision for w...
IPPS
2005
IEEE
15 years 3 months ago
2005
IEEE
Left unchecked, the fundamental drive to increase peak performance using tens of thousands of power hungry components will lead to intolerable operating costs and failure rates. R...
94
Voted
DAC
1997
ACM
15 years 1 months ago
1997
ACM
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
100
Voted
TCSV
2008
14 years 9 months ago
2008
The objective of dynamic voltage scaling (DVS) is to adapt the frequency and voltage for configurable platforms to obtain energy savings. DVS is especially attractive for video dec...