318 search results - page 52 / 64 » Power minimization for dynamic PLAs |
CASES
2010
ACM
14 years 7 months ago
2010
ACM
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
79
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ICALP
2009
Springer
15 years 4 months ago
2009
Springer
Speed scaling is a power management technique that involves dynamically changing the speed of a processor. This gives rise to dualobjective scheduling problems, where the operating...
VLSID
2006
IEEE
15 years 3 months ago
2006
IEEE
This tutorial present the key aspects of design challenges and its solutions that are being experienced in VLSI design in the era of nano technology. The focus will be on design c...
121
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ICDE
2011
IEEE
14 years 1 months ago
2011
IEEE
— In a wireless sensor network (WSN), each sensor monitors environmental parameters, and reports its readings to a base station, possibly through other nodes. A sensor works in c...
97
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ISCA
2012
IEEE
13 years 1 days ago
2012
IEEE
Dynamic random-access memory (DRAM) is the building block of modern main memory systems. DRAM cells must be periodically refreshed to prevent loss of data. These refresh operation...