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» Power optimizations for transport triggered SIMD processors
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VLDB
2007
ACM
145views Database» more  VLDB 2007»
14 years 6 months ago
Executing Stream Joins on the Cell Processor
Low-latency and high-throughput processing are key requirements of data stream management systems (DSMSs). Hence, multi-core processors that provide high aggregate processing capa...
Bugra Gedik, Philip S. Yu, Rajesh Bordawekar
IPPS
2007
IEEE
14 years 21 days ago
RAxML-Cell: Parallel Phylogenetic Tree Inference on the Cell Broadband Engine
Computational phylogeny is a challenging application even for the most powerful supercomputers. It is also an ideal candidate for benchmarking emerging multiprocessor architecture...
Filip Blagojevic, Alexandros Stamatakis, Christos ...
SIGMOD
2010
ACM
166views Database» more  SIGMOD 2010»
13 years 1 months ago
FAST: fast architecture sensitive tree search on modern CPUs and GPUs
In-memory tree structured index search is a fundamental database operation. Modern processors provide tremendous computing power by integrating multiple cores, each with wide vect...
Changkyu Kim, Jatin Chhugani, Nadathur Satish, Eri...
ISCA
2006
IEEE
154views Hardware» more  ISCA 2006»
14 years 13 days ago
SODA: A Low-power Architecture For Software Radio
The physical layer of most wireless protocols is traditionally implemented in custom hardware to satisfy the heavy computational requirements while keeping power consumption to a ...
Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scot...
CSREAESA
2006
13 years 7 months ago
A Dual-core Embedded System-on-Chip Architecture for Multimedia Signal Processing Applications
- This paper presents a dual-core embedded System-on-Chip for a wide range of application fields with particularly high processing demands, including general signal processing, vid...
Hong Yue, Kui Dai, Zhiying Wang