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» Power scalable processing using distributed arithmetic
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CODES
2004
IEEE
15 years 1 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
CBMS
2008
IEEE
15 years 4 months ago
Using the Grid for Enhancing the Performance of a Medical Image Search Engine
— In this paper we show how Grid computing can be used to improve the operation of a medical image search system. The paper introduces the basic principles of a content-based ima...
Mikko Juhani Pitkänen, Xin Zhou, Antti Eero J...
PPOPP
2006
ACM
15 years 3 months ago
Performance characterization of molecular dynamics techniques for biomolecular simulations
Large-scale simulations and computational modeling using molecular dynamics (MD) continues to make significant impacts in the field of biology. It is well known that simulations...
Sadaf R. Alam, Jeffrey S. Vetter, Pratul K. Agarwa...
ICIAP
2003
ACM
15 years 10 months ago
Olympus: an ambient intelligence architecture on the verge of reality
This paper presents Olympus, a modular processing architecture for a distributed ambient intelligence. The system is aimed at detailed reporting of people wandering and gesturing ...
F. Bertamini, Roberto Brunelli, Oswald Lanz, A. Ro...
PARLE
1987
15 years 1 months ago
Emulating Digital Logic using Transputer Networks (very High Parallelism = Simplicity = Performance)
Modern VLSI technology has changed the economic rules by which the balance between processing power, memory and communications is decided in computing systems. This will have a pr...
Peter H. Welch