Abstract—Low-power, single-chip integrated systems are prevailing in remote applications due to the increasing power and delay cost of inter-chip communication compared to on-chi...
Robert M. Senger, Eric D. Marsman, Michael S. McCo...
Abstract- This paper describes the implementation of an areaefficient and protected user memory-mapped network interface, the pbuf (Parcel Buffer), for the Data IntensiVe Architect...
Sumit D. Mediratta, Craig S. Steele, Jeff Sondeen,...
— We demonstrate dynamic power maximization and synchronization of a wireless RF communication link through adaptation of the radiation pattern of a phased array at the transmitt...
Dimitrios N. Loizos, Paul-Peter Sotiriadis, Gert C...
We present a low-power architectural MPEG-4 part-10 AVC/H.264 video and MPEG-4 BSAC audio decoder chip capable of delivering high-quality and high-compression in wireless multimed...
Bontae Koo, Juhyun Lee, Sekho Lee, Jinkyu Kim, Min...
Memory system reliability is a serious and growing concern in modern servers. Existing chipkill-level memory protection mechanisms suffer from several drawbacks. They activate a l...
Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev B...