390 search results - page 38 / 78 » Power system on a chip (PSoC) |
115
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EMSOFT
2005
Springer
15 years 5 months ago
2005
Springer
Recent research in embedded computing indicates that packing multiple processor cores on the same die is an effective way of utilizing the ever-increasing number of transistors. T...
130
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CADE
1998
Springer
15 years 4 months ago
1998
Springer
Abstract. We present the first implementation of a theorem prover running on a smart card. The prover is written in Java and implements a dual tableau calculus. Due to the limited ...
NOCS
2010
IEEE
14 years 10 months ago
2010
IEEE
—Three-dimensional network-on-chip (3D NoC), the combination of NoC and die-stacking 3D IC technology, is motivated to achieve lower latency, lower power consumption, and higher ...
DATE
2008
IEEE
15 years 6 months ago
2008
IEEE
With technology advances, the number of cores integrated on a chip and their speed of operation is increasing. This, in turn is leading to a significant increase in chip temperat...
ISCAS
2005
IEEE
15 years 5 months ago
2005
IEEE
Abstract— We designed a high-efficiency class-E switchedmode power amplifier for a wireless networked micro-sensors system. In this system, where each sensor operates using a mic...