70 search results - page 12 / 14 » Predicated Software Pipelining Technique for Loops with Cond... |
CASES
2007
ACM
13 years 10 months ago
2007
ACM
Delayed branching is a technique to alleviate branch hazards without expensive hardware branch prediction mechanisms. For VLIW processors with deep pipelines and many issue slots,...
PLDI
2009
ACM
14 years 1 months ago
2009
ACM
Translation validation is a technique for checking that, after an optimization has run, the input and output of the optimization are equivalent. Traditionally, translation validat...
IPPS
2006
IEEE
14 years 9 days ago
2006
IEEE
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
FMCAD
2008
Springer
13 years 7 months ago
2008
Springer
Automatic techniques for software verification focus on obtaining witnesses of program failure. Such counterexamples often fail to localize the precise cause of an error and usuall...
COSPS
2001
Springer
13 years 10 months ago
2001
Springer
Abstract. Array privatization is one of the most e ective transformations for the exploitation of parallelism. In this paper, we present a technique for automatic array privatizati...