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176
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ARCS
2012
Springer
13 years 11 months ago
Fast Scenario-Based Design Space Exploration using Feature Selection
: This paper presents a novel approach to efficiently perform early system level design space exploration (DSE) of MultiProcessor System-on-Chip (MPSoC) based embedded systems. By...
Peter van Stralen, Andy D. Pimentel
173
Voted
HPCA
2008
IEEE
16 years 4 months ago
System level analysis of fast, per-core DVFS using on-chip switching regulators
Portable, embedded systems place ever-increasing demands on high-performance, low-power microprocessor design. Dynamic voltage and frequency scaling (DVFS) is a well-known techniq...
Wonyoung Kim, Meeta Sharma Gupta, Gu-Yeon Wei, Dav...
141
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ICPP
1999
IEEE
15 years 8 months ago
SLC: Symbolic Scheduling for Executing Parameterized Task Graphs on Multiprocessors
Task graph scheduling has been found effective in performance prediction and optimization of parallel applications. A number of static scheduling algorithms have been proposed for...
Michel Cosnard, Emmanuel Jeannot, Tao Yang
141
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IMC
2009
ACM
15 years 10 months ago
Scalable proximity estimation and link prediction in online social networks
Proximity measures quantify the closeness or similarity between nodes in a social network and form the basis of a range of applications in social sciences, business, information t...
Han Hee Song, Tae Won Cho, Vacha Dave, Yin Zhang, ...
131
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CLUSTER
2008
IEEE
15 years 10 months ago
A trace-driven emulation framework to predict scalability of large clusters in presence of OS Jitter
—Various studies have pointed out the debilitating effects of OS Jitter on the performance of parallel applications on large clusters such as the ASCI Purple and the Mare Nostrum...
Pradipta De, Ravi Kothari, Vijay Mann